- Half Adder Definition: A half adder is defined as a basic four-terminal digital device that adds two binary input bits, outputting a sum and a carry bit.
- Binary Addition: When adding binary bits, the half adder handles combinations like 0+0, 0+1, 1+0, and 1+1, with specific sum and carry results.
- Truth Table: The truth table for a half adder explains the sum and carry outcomes for each possible input combination.
- XOR and AND Operations: The sum is obtained using the XOR gate, and the carry is obtained using the AND gate in a half adder circuit.
- Half Adder Circuit Design: To explain a half adder with its truth table, the circuit design uses one XOR gate and one AND gate to achieve the required outputs.
A half adder is a simple digital circuit that adds two binary bits. A binary bit is either 0 or 1. Therefore, there are four possible combinations: 0 + 0, 0 + 1, 1 + 0, and 1 + 1.
We know that decimally:
Decimal 2 is represented as 10 in the binary system, which is the smallest double-digit binary number. Adding 1 + 1 in binary results in a sum of 0 and a carry of 1 because the result is 10. When adding 0 + 0, 0 + 1, and 1 + 0, the sum is 0 or 1, with no carry. We can summarize this in a truth table for the half adder.
Half Adder Truth Table
| A | B | A + B | Decimal Output | Binary Output | Sum (A ⊕ B) | Carry (A ⋅ B) |
| 0 | 0 | 0 + 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 0 + 1 | 1 | 1 | 1 | 0 |
| 1 | 0 | 1 + 0 | 1 | 1 | 1 | 0 |
| 1 | 1 | 1 + 1 | 2 | 10 | 0 | 1 |
The truth table shows that the sum of two binary inputs is the result of an XOR operation, which can be implemented using an XOR gate. The carry is the result of an AND operation, implemented using an AND gate.
Circuit of Half Adder
Using one XOR gate and one AND gate, we can easily design a half adder, as shown below.
