Binary Adder Half and Full Adder

A binary adder is a combinational logic circuit that adds binary values. Its outputs depend only on the inputs present at that moment, so the circuit does not store an earlier state. The two basic one-bit circuits are the half adder and the full adder.

Designing Binary Adder

Half Adder

A half adder performs the simplest form of binary addition: adding two one-bit binary numbers. It has two inputs and two outputs, but it has no input for a carry from an earlier bit position.

The binary digits are 0 and 1, so adding two bits gives four possible input combinations.

The first three combinations produce no carry. The case 1 + 1 produces binary 10: the right-hand bit is the sum output, and the left-hand bit is the carry-out. A half adder produces these two outputs for one pair of input bits.

Design of Half Adder

To design a half adder, label the input bits A and B and the outputs sum S and carry C. The truth table lists all four input combinations.
The sum is 1 when exactly one input is 1, while the carry is 1 only when both inputs are 1.

Truth Table for Half Adder

K-map for Half Adder

A separate K-map can be drawn for each output.

The maps give S = A XOR B and C = A AND B.

The resulting half-adder circuit is shown below.

The truth table shows that carry C follows the AND operation, while sum S follows XOR. K-map reduction reaches the same equations and is especially useful when a circuit has more inputs.

Full Addition

Multi-bit addition must include the carry produced by the preceding, less-significant column. Consider 1101 + 0111.

As in decimal arithmetic, binary addition starts at the least significant bit and moves left.

1. Add the least significant bits first.
   
   Here, 1 + 1 = 10. Write the sum bit 0 in the result and carry 1 into the next column.
2. In the next column, add the two operand bits and the incoming carry. For this example, 0 + 1 + 1 = 10, so write another 0 and carry 1 into the following column.

1. Repeat the same operation for each column through the most significant bits. Write each sum bit in its column and pass each carry to the column on its left. The final carry becomes a new most significant bit, giving 1101 + 0111 = 10100.

Full Adder

A full adder handles one column of multi-bit addition. It accepts operand bits A and B plus an incoming carry Cin, then produces sum S and carry-out Cout.
The truth table covers all eight combinations of the three inputs.

Separate K-maps reduce the sum and carry-out C_out functions.

The reduced equations are S = A XOR B XOR Cin and Cout = AB + A Cin + B Cin. Carry-out is therefore 1 when at least two of the three inputs are 1.
The gate-level circuit can be assembled from two half adders and an OR gate.


Its carry-out connects to the next more-significant stage.

Binary Parallel Adder

A single full adder processes one bit position. A multi-bit parallel adder connects one stage for each bit position. The operand bits enter their stages in parallel, but in the ripple-carry arrangement shown below, each stage must receive carry-out from the stage to its right before its result is final.
Four full adders form this 4-bit ripple-carry circuit.

The example adds two four-bit operands.
The values are 1011 and 1101.


There is no incoming carry before the least significant stage, so C₀ = 0.

The carry then ripples through the stages, producing the final result shown below.

Compatible parallel adders and discrete stages can be cascaded to build a wider n-bit circuit. The 4008 family consists of four-bit full-adder ICs with four sum outputs and a carry output.
A current MC14008B data sheet identifies that device as a pin-for-pin replacement for the CD4008B. Carry-out from one section connects to carry-in of the next section, extending the carry path through a wider parallel adder.