Registers are the devices used to store the data bits. The bits stored in such registers can be made to move within the registers and/or in/out of the registers by applying clock pulses. Such registers are called shift registers. An n-bit shift register can be formed by cascading n flip-flops where each flip-flop stores a single bit of information (Figure 1). Here the clear line is used to reset each flip-flop which in turn clears the entire register.
Shift registers can be categorized based on the type of data movement.
- Category 1: Depending on the Direction of Data Shift
- Category 2: Depending on the Mode of Data In or Out
Category 1: Depending on the Direction of Data Shift
Unidirectional Shift Register
In this type, the data bits within the register can move only in one direction i.e. either towards left or towards right, accordingly they are called Left-Shift Register or Right-Shift Register (Figure 2).
Bidirectional or Reversible Shift Register
Bidirectional shift registers (Figure 3) are the shift registers which are capable of shifting the data in either direction i.e. both towards left (indicated by green arrows) as well as towards right (indicated by red arrows). This is accomplished by modifying the circuit of unidirectional shift registers by providing certain additional circuitry including a control (black color) line which aids in selecting the direction of data-shift.
Category 2: Depending on the Mode of Data In or Out
Serial In Serial Out (SISO) Shift Register
In case of serial in serial out shift registers (Figure 4a), both data loading as well as data retrieval processes are performed serially, in bit-by-bit fashion. Here for every clock pulse three functions are performed viz.,
- One bit of data enters into the register,
- Data within the register shifts either right or left by one bit,
- One data bit will come out of the shift register.
However it is to be noted that valid data bit comes out of the n-bit SISO register only after the application of n clock pulses. Further one requires providing additional n clock pulses in order to retrieve the entire n-bit input word.
Serial In Parallel Out (SIPO) Shift Register
In serial in parallel out shift registers (Figure 4b), data is loaded into the register bit-by-bit while it is retrieved in parallel fashion. In this case, at every clock pulse
- One bit of data enters into the register,
- Data within the register shifts either right or left by one bit.
Meanwhile the output bits can be read-out in parallel, one bit from each of the individual register component. Further it is to be noted that valid n-bit data word comes out of the n-bit SIPO register just after the application of n clock pulses.
Parallel In Serial Out (PISO) Shift Register
In case of parallel in serial out shift registers (Figure 4c), the data loading happens in parallel fashion while the data retrieval is serial in nature. Here the entire input word enters into the shift-register at a single clock cycle. From then on, for each clock cycle.
- Data within the register shifts either right or left by one bit
- One bit exits the register.
This means that the data bits of the input word are obtained at the PISO output bit-by-bit. This indicates that in order to obtain the entire n-bit input word, one would have to wait for additional n clock cycles.
Parallel In Parallel Out (PIPO) Shift Register
In parallel in parallel out shift registers (Figure 3d) both data loading as well as data retrieval processes are parallel in nature. This means that the entire data word can be entered into the registers at a single clock tick. Similarly this entire data word can be obtained at the output pins of the individual register components by just providing one more clock pulse. However it is to be noted that these kinds of shift registers are also capable of shifting the data bits either towards right or towards left.
Further if the data-out pin of the shift-registers is back connected to the data-in pin, then the bits of the input word circulate within the registers without being lost.
Shift registers are used when there is a need to accomplish a particular task with reduced number of control pins. For example in order to control 16 LEDs, one would require 16 individual lines of a micro controller. However due to the limited number of available general purpose input output (GPIO) pins, this will not be feasible. In such a case, a series combination of two shift registers would prove to be helpful as it can accomplish the task with just 4 I/O pins.
Further, shift registers are extensively used to convert serial data stream into parallel form and vice-versa.
