Shift Registers

A shift register is a register that stores bits and moves them one stage per clock pulse, either inside the register or in and out of it. n flip-flop stages, each holding one bit, make an n-bit shift register. A shared clear line resets every stage and empties the register.

Shift registers are grouped by shift direction and by how bits enter and leave.

• Category 1: Depending on the Direction of Data Shift
• Category 2: Depending on the Mode of Data In or Out

Category 1: Depending on the Direction of Data Shift

Unidirectional Shift Register

Bits move only one way, left or right. Those circuits are a left-shift register or a right-shift register (Figure 2).

Bidirectional or Reversible Shift Register

Bidirectional shift registers (Figure 3) shift left or right. Extra gates plus a direction-control line are added to a one-way register.

Category 2: Depending on the Mode of Data In or Out

Serial In Serial Out (SISO) Shift Register

In a serial in serial out shift registers (Figure 4a) bits are loaded and read one at a time. Each clock pulse does three things:

1. One bit of data enters into the register,
2. Data within the register shifts either right or left by one bit,
3. One data bit will come out of the shift register.

The first valid bit leaves an n-bit SISO register only after n clock pulses. Another n pulses are then needed to read the whole n-bit word out.

Serial In Parallel Out (SIPO) Shift Register

A serial in parallel out shift registers (Figure 4b) loads bits one at a time and presents them all at once. Each clock pulse

1. One bit of data enters into the register,
2. Data within the register shifts either right or left by one bit.

Each stage output can be read at the same time. A valid n-bit word is present on the SIPO register after n clock pulses.

Parallel In Serial Out (PISO) Shift Register

A parallel in serial out shift registers (Figure 4c) loads the whole word in one clock and then sends it out one bit at a time. After that load, each later clock

1. Data within the register shifts either right or left by one bit
2. One bit exits the register.

The word therefore leaves the PISO output one bit per clock. Reading all n bits takes n further clock cycles.

Parallel In Parallel Out (PIPO) Shift Register

In parallel in parallel out shift registers (Figure 3d) both data loading as well as data retrieval processes are parallel in nature. This means that the entire data word can be entered into the registers at a single clock tick. Similarly this entire data word can be obtained at the output pins of the individual register components by just providing one more clock pulse. However it is to be noted that these kinds of shift registers are also capable of shifting the data bits either towards right or towards left.

Further if the data-out pin of the shift-registers is back connected to the data-in pin, then the bits of the input word circulate within the registers without being lost.
Shift registers are useful when you need to reduce the number of control pins. For instance, to control 16 LEDs, you would need 16 lines from a microcontroller. Due to limited GPIO pins, this isn’t feasible. Using two shift registers in series can control the LEDs with just 4 I/O pins.
Shift registers are also used to convert serial data streams into parallel form and vice versa.