Data Transfer in Shift Registers

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Key learnings:
  • Shift Registers Definition: Shift registers are defined as devices that store and shift bits of input data in sync with clock pulses.
  • Data Movement: Data in shift registers can move left or right, determined by clock pulses, allowing for various types of data transmission.
  • Buffer Register in Digital Electronics: A buffer register in digital electronics stores data temporarily and allows controlled movement of data bits.
  • Circular Shift: By connecting the last flip-flop’s output to the first, data can circulate continuously within the register.
  • Types of Shift Registers: There are right-shift and left-shift registers, which determine the direction of data movement within the register.

Shift registers are devices used to store and shift bits of input data. Data bits can enter or exit the register in serial or parallel mode, synchronized with the clock pulse. Data bits within the shift register can move right or left with each clock pulse.

Consider a 3-bit register formed by connecting three synchronous positive edge triggered D flip-flops as shown in Figure 1. Here it is seen that the CLR pins of all the flip-flops are tied-up together and are connected to the clear input. Further the output of FF1 (Q1) is connected as an input to flip-flop 2 (D2 of FF2) and the output of FF2, Q2 is connected as an input to flip-flop 3 (D3 of FF3). Moreover the data word which is to be stored is supplied to the register via the input pin of flip-flop 1 (D1 of FF1) while the data is collected from the output pin of third flip-flop (Q3 of FF3).

3 bit shift register circuit
Generally, the contents of each flip-flop (and thus the entire register) are set to zero by driving the clear pins high before feeding in the data. Then, the first bit of the input word (B1) appears at D1.

This bit will be stored in FF1 and thereby appears at its output Q1 on the appearance of first leading edge of the clock. Further at the second clock tick, B1 is stored in FF2 and is obtained at Q2 while the data at Q1 will the second bit of the input word, B2. Similarly at the rising edge of the third clock pulse, the third bit of the input data word, B3 appears at Q1 while Q2 = B2 and Q2 = B1.
This is called right-shift data transmission as one can note the movement of data from left to right within the register. The operation of such a register is further emphasized by Figure 2 in terms of wave forms and by Table I which indicates the movement of data bits (green arrows), considering the data-in sequence as 100100.

input output waveform for 4 bit buffer register
right shift of data bits in the shift register

In the shift register explained above, the data bit stored in the last flip-flop is lost when a new data bit is stored in the register. This can be avoided by connecting the output pin of FF3 back to the D1 pin of FF1. This causes the output bit of FF3 (Q3) to be stored in FF1, allowing data bits to circulate within the register. However, the movement of data bits within the intermediate flip-flops remains the same.

Similar to the right-shift register, there are left-shift registers in which the data moves from right to left within the register. Further in some cases, the data loading and retrieval processes of the shift registers are controlled using additional circuitry. Never the less the basic functionality remains the same. Moreover one has to note that the mode of data movement explained remains the same irrespective of the size of the shift register.

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