- PIPO Shift Register Definition: A PIPO shift register is a type of storage device where data loading and retrieval happen in parallel at a single clock pulse.
- Data Handling: Both the input and output of data in a PIPO shift register occur simultaneously, enabling efficient data management.
- Modification for Shifting: To convert a basic PIPO register into a PIPO shift register, additional combinational circuits and control lines are added.
- Right-shift Operation: By activating certain control lines, a PIPO shift register can shift data bits to the right, demonstrating its dynamic functionality.
- Educational Figures: The use of figures and tables in the article visually explains how data shifts within the register, aiding comprehension.
Parallel In Parallel Out (PIPO) shift registers load a word and present it on all outputs in the same clock. Figure 1 is an n-bit PIPO register. On the first clock each stage stores its own input bit (FF1 stores B1 at D1; FF2 stores B2 at D2 … FFn stores Bn at Dn). That same clock puts each stored bit on the matching flip-flop output (Q1 = D1; Q2 = D2 … Qn = Bn). Load and read therefore finish in one pulse.
Figure 1 cannot shift. Extra gates and control lines, shown in Figure 2, turn that register into a PIPO shift register.
When the control line is low the A2 AND gates turn on and the A1 gates turn off.
The Data in bits that enter the A2 gates then pass through each OR gate and are stored on the first rising clock. B1 goes straight into FF1. The whole word is loaded on that clock and also appears on the outputs, so the parallel word is available at once.
When the control line is high the A1 gates turn on and the A2 gates turn off. Each flip-flop then feeds the next stage through an OR gate, except FFn: the output of FF1 (Q1) is the output of OR gate 1 (O1) into D2; Q2 = output of O2 = D3 and so on. The next rising clock moves Q1 to Q2, Q2 to Q3, … and Qn-1 to Qn. That is a one-bit right shift. Table I and Figure 3 show it.
The same control scheme wired the other way is a left-shift PIPO (Figure 4).
