- Digital Comparator Definition: A digital comparator is defined as a circuit that compares two binary numbers and indicates whether one is greater, equal, or smaller than the other.
- Single-Bit Digital Comparator: Compares two single-bit binary numbers and provides outputs for greater, equal, and smaller conditions.
- Multi-Bit Digital Comparator: Extends comparison to multi-bit binary numbers, often using a 4-bit comparator as a basic building block.
- Working Principle: The comparator evaluates each bit, starting from the most significant, to determine the output condition.
- IC 7485: A 4-bit digital comparator IC that can be cascaded for comparing larger binary numbers, with specific input and output terminals for seamless integration.
A digital comparator, or magnitude comparator, compares two binary numbers. It asserts one of three mutually exclusive results: A > B, A = B or A < B. For one-bit inputs A and B, label the corresponding active-high outputs G, E and L.
The required outputs are:
G = 1 when A > B.
E = 1 when A = B.
And:
L = 1 when A < B.
For every valid input pair, exactly one output is high. The other two outputs remain low.
| A | B | G | E | L |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 1 | 0 |
When A = 0 and B = 0, A = B and E = 1.
When A = 0 and B = 1, A < B and L = 1.
When A = 1 and B = 0, A > B and G = 1.
When A = 1 and B = 1, A = B and E = 1.
The truth table gives the Boolean equations below. Equality uses XNOR logic, while the greater-than and less-than outputs each require one input and the complement of the other.
The corresponding gate circuit is:
This circuit compares one-bit words, so it is a one-bit magnitude comparator.
For multi-bit words in the binary number system, the most significant unequal bit determines the result. Consider a four-bit digital comparator and use the diagram’s convention that bit 1 is the most significant.
Let the two four-bit words be:
Compare their bit pairs from most to least significant.
Condition (1): when A1 > B1, meaning A1 = 1 and B1 = 0, A > B and G = 1.
Condition (2): when A1 = B1 and A2 > B2, meaning A2 = 1 and B2 = 0, A > B and G = 1.
Condition (3): when A1 = B1, A2 = B2 and A3 > B3, meaning A3 = 1 and B3 = 0, A > B and G = 1.
Condition (4): when A1 = B1, A2 = B2, A3 = B3 and A4 > B4, meaning A4 = 1 and B4 = 0, A > B and G = 1.
G = 1 when any one of those ordered conditions is true:
The less-than result follows the same pattern with A and B exchanged:
For equality, every corresponding bit pair must match:
Substituting each bit-equality term gives:
The three equations define the combinational logic circuit.
This is a four-bit unsigned magnitude comparator.
Four-Bit Magnitude Comparator ICs
The 7485 family includes four-bit magnitude-comparator Integrated Circuit devices such as the SN74LS85 and 74HC85. Select the exact digital comparator variant from its current data sheet because supply voltage, input levels and timing differ. The three cascade inputs are (A < B)in, (A = B)in and (A > B)in; the matching outputs are (A < B)out, (A = B)out and (A > B)out. For wider words, connect (A < B)out, (A = B)out and (A > B)out from the less-significant stage to (A < B)in, (A = B)in and (A > B)in on the more-significant stage. On the least-significant stand-alone stage, set the less-than input low, equality input high and greater-than input low.
