- 2s Complement Definition: 2s complement arithmetic is a method for representing signed binary numbers and performing arithmetic operations on them.
- Binary Representation: To represent a negative number in binary, find the number that adds to the original to make zero, then flip all bits and add 1.
- Sign Bit: The leftmost bit of a binary number shows its sign—0 for positive and 1 for negative.
- 2s Complement Addition: Add numbers directly, ignoring any carry beyond the leftmost bit for simplicity.
- 2s Complement Subtraction: Convert the subtrahend to its negative form using 2s complement, then add it to the minuend.
2’s complement represents signed integers so that fixed-width binary arithmetic can use the same addition hardware for signed and unsigned bit patterns. The result still depends on the chosen bit width and on whether those bits are interpreted as signed or unsigned.
How to represent decimal number in 2’s complement?
A negative integer is the additive inverse of its positive counterpart: adding the two gives zero. That idea also applies to a fixed-width binary word.
The equation below shows the relationship.
In the binary system, the bits carry both the magnitude and the sign. For an n-bit two’s complement value, the range is -2^(n-1) to 2^(n-1) – 1. An 8-bit value therefore ranges from -128 to 127.
Within an n-bit word, a value and its two’s complement negative add to zero modulo 2^n. Any carry beyond the n available bits is discarded.
For example, positive 5 is 0000 0101 in an 8-bit word. The bit pattern for negative 5 must add to it and leave 0000 0000 in those eight bits.
The resulting bit pattern represents (-5)10.
To find the 2’s complement of 0000 0101, invert every bit and add 1.
This produces the fixed-width negative of a binary number. Start with the positive value (5)10. For (5)10, the 8-bit representation is (0000 0101)2; invert it to 1111 1010, and add 1 to obtain 1111 1011.
Positive values use their ordinary binary form, so (5)10 is (0000 0101)2 in an 8-bit signed word. To encode (-5)10 in 2’s complement, the result for (-5)10 starts with the 1’s complement: change each 0 to 1 and each 1 to 0. Then add 1. For 0000 0101, those steps give 1111 1010 and then 1111 1011.
The chart below compares the signed and unsigned interpretations of the same 8-bit patterns.
(+5)10 and (5)10 both use 0000 0101. The pattern 1111 1111 is (-1)10 when signed but (255)10 when unsigned. Likewise, (-5)10 uses the same bits as unsigned (251)10.
A negative pattern and the positive value of the same magnitude add to zero after any carry outside the chosen width is discarded.
For a signed two’s complement number, the leftmost or most significant bit is the sign bit.
- If the leftmost bit is 0, the signed value is zero or positive.
- If the leftmost bit is 1, the signed value is negative.
Arithmetic in 2’s Complement Method
2’s Complement Addition
Two’s complement addition uses ordinary fixed-width binary addition. For example, add (8)10 and (-3)10.
Encode both values in the same width using 2’s complement, then add their bits.
Discard the carry beyond the 8-bit result. The remaining pattern is 0000 0101, or 5. Carry-out does not determine the sign. Signed overflow occurs when two operands with the same sign produce a result with the opposite sign; equivalently, the carries into and out of the sign bit differ.
2’s Complement Subtraction
Two’s complement subtraction changes the subtrahend to its negative form and adds it to the minuend. To subtract (8)10 from (9)10, first convert (8)10 to (-8)10, then add it to 9.
The fixed-width result is 0000 0001, so the answer is positive 1. As with addition, discard carry-out and check signed overflow separately. This use of negation and addition is the basis of subtraction in 2’s complement.
2’s Complement Multiplication
Signed two’s complement multiplication uses binary multiplication with sign-aware handling, such as sign extension or Booth’s algorithm. For example, (-4)10 multiplied by (4)10 gives (-16)10. In 8 bits, (-4)10 is 1111 1100 and (4)10 is 0000 0100.
A complete product of two n-bit operands can require 2n bits, so truncating it to n bits may overflow.
2’s Complement Division
Signed division must account for the operand signs. A simple method divides the magnitudes and then applies the correct signs to the quotient and remainder; hardware may instead use restoring or non-restoring division. Repeated subtraction can illustrate small examples, but it is not the usual efficient implementation. For (7)10 ÷ (3)10, the quotient is (2)10 and the remainder is (1)10. The same values can be encoded in 2’s complement.
Two successful subtractions give the quotient (2)10. Division by zero is undefined, and dividing the most negative n-bit value by -1 overflows an n-bit signed result.
