- MOSFET Definition: A MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is defined as a capacitor-operated transistor device that controls current flow using voltage.
- Types of MOSFETs: MOSFETs come in four types: P-Channel and N-Channel in both Enhancement and Depletion modes, each with unique construction and operation.
- P-Channel Enhancement MOSFET: Uses a lightly doped n-type substrate and forms a conductive channel when a negative gate voltage is applied, allowing current flow.
- N-Channel Enhancement MOSFET: Utilizes a lightly doped p-type substrate and forms a conductive channel with a positive gate voltage, enabling current flow.
- Voltage Control: MOSFETs are voltage-controlled devices, meaning the gate voltage controls the current between the source and drain, a key concept in understanding mosfet electrical4u.
MOSFET stands for Metal-Oxide-Semiconductor Field-Effect Transistor. An insulated gate creates an electric field that controls charge in the semiconductor surface and therefore controls the channel between source and drain. This gate structure gives a MOSFET very high DC input resistance, although its capacitances require current during switching. The broader names Insulated Gate Field Effect Transistor (IGFET) and Metal Insulator Field Effect Transistor (MIFET) also cover devices whose gate conductor or dielectric is not literally metal and silicon dioxide. The working principle of mosfet depends on channel polarity and on whether a channel exists at zero gate bias. This produces four basic categories.
- P – Channel Enhancement MOSFET
- N – Channel Enhancement MOSFET
- P – Channel Depletion MOSFET
- N – Channel Depletion MOSFET
P – Channel Enhancement MOSFET
A p channel MOSFET, or PMOS, uses p-type source and drain regions in an n-type body. This section describes a conventional planar silicon device. Channel length L is the effective source-to-drain distance controlled by the gate, and its value depends on the fabrication process rather than a universal 1 µm scale. The channel length also differs from the drawn gate dimension because source and drain fields affect the active channel.
A thin gate dielectric separates the gate electrode from the semiconductor. Traditional silicon devices used silicon dioxide (SiO2), while some processes use materials such as Al2O3 or other high-permittivity dielectrics. SiO2 remains a useful introductory model. The gate conductor may be metal or doped polysilicon above the SiO2 layer.
The gate conductor, dielectric and semiconductor surface form a MOS capacitor. 
The p-type diffusions form source and drain, while the insulated conductor is the gate and the body provides a fourth terminal. Designers often tie body to source so its junctions remain reverse biased. A PMOS source and body normally sit at the circuit’s higher potential rather than earth.
Making the gate negative relative to the source and body repels electrons from the surface. The surface first depletes and then accumulates mobile holes in an inversion layer when gate-source voltage passes the negative threshold.
The electric field moves majority electrons away from the n-type surface and leaves fixed positive donor ions in the depletion region. Passing threshold does not break covalent bonds or create new electron-hole pairs under the SiO2 layer. Instead, holes supplied through the p-type source and drain regions form the conducting inversion channel. A more negative gate-source voltage increases inversion charge and reduces channel resistance.
Making the drain negative relative to the source produces a lateral electric field and hole current. As drain-source magnitude increases, the local gate-to-channel overdrive becomes smaller near the drain and the inversion charge tapers there. Beyond the pinch-off condition, current enters saturation rather than stopping.
In the linear region, channel resistance depends on geometry, carrier mobility, gate capacitance per area, temperature and gate overdrive. Gate voltage controls current electrostatically, while the external circuit supplies the drain current. This is the operation of a P-Channel Enhancement MOSFET.
N – Channel Enhancement MOSFET
An N-Channel Enhancement MOSFET reverses the dopant and voltage polarities of the PMOS structure. It has n-type source and drain regions in a p-type body. In a ground-referenced low-side circuit, body and source can both be at ground, but other circuits reference them to a different potential. A positive gate-source voltage repels holes and leaves fixed negative acceptor ions in a depletion region. Above threshold, electrons supplied mainly by the n-type source form an inversion channel at the dielectric interface. A positive drain-source voltage then drives conventional current from drain to source, opposite to electron motion. Increasing gate overdrive raises inversion charge and lowers linear-region channel resistance. Current also depends on drain-source voltage and enters saturation when the channel pinches off near the drain. This defines the N-Channel Enhancement MOSFET. 
N – Channel Depletion MOSFET
The working principle of depletion MOSFET starts with a conducting channel already present at zero gate-source bias. An n-channel depletion device uses a p-type semiconductor body with n-type source and drain regions. A doped n-type semiconductor channel joins them. A positive drain-source voltage can therefore produce current when gate-source voltage is zero.
A negative gate-source voltage repels channel electrons from the interface under the SiO2 dielectric and exposes fixed positive donor ions. This depletion reduces channel charge, conductivity and drain current. A sufficiently negative gate voltage can turn the device off, while a positive gate voltage increases channel charge above the zero-bias value. Because channel potential rises from source to drain, local gate-to-channel voltage varies along the channel and depletion is normally stronger near the drain. The SiO2 remains an insulator throughout normal operation. 
P – Channel Depletion MOSFET
A p-channel depletion MOSFET reverses the dopants and voltage polarities of the n-channel device. Its preformed p-type channel conducts at zero gate-source bias. A positive gate-source voltage repels holes from the interface and exposes fixed negative acceptor ions, which reduces channel charge and drain current. A negative gate-source voltage instead increases hole concentration and channel conductance. The source, drain, body and gate voltages must be compared using a consistent sign convention. 





