- Demultiplexer Definition: A demultiplexer (demux or data distributor) is defined as a circuit that distributes multiple outputs from a single input.
- Working Principle: It operates by using a control signal to select which output line will receive the input data.
- Types of Demultiplexers: Includes 1-to-2, 1-to-4, 1-to-8, and 1-to-16 types, based on the number of output lines.
- Communication Applications: Demultiplexers are crucial in communication systems for transmitting and receiving signals.
- ALU and Data Conversion: Used in ALUs for directing output to registers and in converters to change serial data to parallel data.
What is a Demultiplexer?
A demultiplexer (also known as a demux or data distributor) is a combinational circuit that routes a single data input to one of several output lines. It behaves like a digitally controlled, many-position switch: if there are n output lines and m select inputs, then n = 2m. The binary code applied to the select inputs decides which output line carries the input at any moment.
A demux also works as a binary-to-decimal decoder. With the data input held at logic 1, the binary value on the select lines drives exactly one output high, so each input code maps to one numbered output. This behavior makes the demux useful for building many other combinational circuits.
The function of a demultiplexer is essentially the reverse of a multiplexer: instead of combining many inputs into one output, it takes one input and directs it to one of many outputs.
The pin diagram of the demultiplexer appears in the figure below.
1 to 4 Demultiplexer
This section analyzes a 1 to 4 demultiplexer in more detail.
Many other types exist, including 1-to-2, 1-to-8 and 1-to-16 demultiplexers, but this article focuses on the 1-to-4 type.
A 1 to 4 demultiplexer has:
- Input
There is one data input bit, labelled Data D. - Outputs
The number of outputs is four. They are Y0, Y1, Y2, and Y3. - Control Bits
Two control (select) bits, A and B, choose the output that receives the data bit. The two-bit value on A and B enables one of the four AND gate paths.
When AB = 01, only the second AND gate from the top is enabled (shown in the figure above).
All three remaining AND gates stay disabled, so the enabled gate passes Data D straight through to its output: Y1 = Data.
Y1 therefore follows D: when D is 0, Y1 stays low (0), and when D is 1 (high), Y1 goes high. The other three outputs remain 0 (low).
If AB = 10, every AND gate is disabled except the second one from the bottom.
Input bit D is then routed to Y2, so Y2 = Data D.
Truth Table
| Data D | Control | Input | Outputs | |||
| – | A | B | Y0 | Y1 | Y2 | Y3 |
| 1 | 0 | 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 | 1 |
The demultiplexer function is available in standard logic families: the IC 74155 provides a dual 2-line-to-4-line decoder/demultiplexer, and the IC 74154 implements a 4-line to 16-line demultiplexer with four select inputs, one data path and sixteen outputs. The reverse combining operation is performed by multiplexers.
Applications of Demultiplexer
Demultiplexers are used in several fields where there is a necessity of connecting a single source to several destinations. These applications of a demultiplexer include:
Communication System of Demultiplexer
Every communication system involves signal transmission and reception. For this to work, the multiplexer at the transmitting end and the demultiplexer at the receiving end must operate together.
Transmission uses a multiplexer to send signals. The single output from the multiplexer becomes the input to the demultiplexer. The demultiplexer then converts this input back to the original signals at the receiver end.
Arithmetic and Logic Unit (ALU) of Demultiplexer
With a demultiplexer in place, the ALU’s output can be delivered to multiple registers or storage units. Here, the ALU output forms the single input of the demultiplexer.
Each demultiplexer output feeds one register, where the data is stored until it is needed.
Serial to Parallel Converter of Demultiplexer
A serial-to-parallel converter rebuilds parallel data from the received serial stream by using that stream as the demultiplexer’s data input.
A counter drives the demultiplexer’s select inputs at regular intervals, so each arriving bit is steered to the next demultiplexer output in sequence.
After every bit has been stored on its own output line, the complete word can be read out in parallel.
