Parameters of JFET or Specifications of JFET

Select a JFET from its current datasheet, not from a typical value alone. Each parameter needs its test voltage, current, frequency and temperature. Absolute maximum ratings are limits rather than operating targets. Common JFET parameters include:

• Gate Cut Off Voltage (V_GS(off))
• Shorted Gate Drain Current (I_DSS)
• Transconductance (g_mo)
• Dynamic Output Resistance (r_d)
• Amplification Factor (μ)

Gate Cut Off Voltage

Gate-source cutoff voltage is the VGS at which drain current I_D falls to a small specified value at a stated drain-source voltage and temperature. For an N-channel JFET, V_GS is negative; for a P-channel device, the polarities reverse. The square-law transfer model is shown here. A datasheet defines the off-current criterion, so V_GS does not represent a perfect mathematical zero current. The associated I_D test value must also be checked. The symbol V_GS(off) is sometimes related to a model pinch-off parameter V_p, but sign conventions and definitions vary. Use the datasheet symbol, range and test conditions rather than assuming the two values are always numerically identical.

Shorted Gate Drain Current

Zero-gate-voltage drain current uses V_GS = 0 and a specified V_DS in the saturation region. Datasheets often label it I_DSS. This test-condition I_DSS differs from the device’s absolute maximum drain-current rating. Its value is not fixed across all samples of one part number; datasheets commonly give a wide minimum-to-maximum range or current ranks.

Transconductance

Small-signal transconductance is the local change in drain current δI_D divided by the change in gate-source voltage δV_GS, with drain-source voltage V_DS held constant at the stated operating point.

The zero-gate-bias model value is often written g_mo. A datasheet may instead specify forward transconductance or forward transfer admittance at a particular drain current, drain voltage and frequency. Under the ideal square-law model, g_mo is the transfer-curve slope at V_GS = 0, and g_m at another bias follows from differentiating I_D. The approximate current relation is

Differentiating drain current I_D with respect to gate-source voltage V_GS gives

At V_GS = 0, the ideal model gives

The corresponding bias-dependent model relation is

Dynamic Output Resistance

Dynamic output resistance is the local change in drain-source voltage δV_DS divided by the change in drain current δI_D, with gate-source voltage V_GS held constant at the stated bias point. The symbol used here is r_d.It is the reciprocal of small-signal output conductance under the same conditions. Channel-length modulation makes this resistance finite, and the value changes with bias and frequency.

Amplification Factor

The intrinsic amplification factor is the magnitude of the change in drain-source voltage δV_DS divided by the opposing change in gate-source voltage δV_GS needed to keep drain current I_D constant.

For the same small-signal bias point, its magnitude equals transconductance g_m multiplied by dynamic output resistance r_d. Datasheets often provide the underlying admittance parameters instead of listing amplification factor directly.